1 | // REQUIRES: aarch64-registered-target |
2 | // RUN: %clang_cc1 -triple arm64-none-linux-gnu \ |
3 | // RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s |
4 | // RUN: %clang_cc1 -triple aarch64-windows \ |
5 | // RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s |
6 | #include <stdint.h> |
7 | |
8 | uint32_t crc32b(uint32_t a, uint8_t b) |
9 | { |
10 | return __builtin_arm_crc32b(a,b); |
11 | // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32 |
12 | // CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]]) |
13 | } |
14 | |
15 | uint32_t crc32cb(uint32_t a, uint8_t b) |
16 | { |
17 | return __builtin_arm_crc32cb(a,b); |
18 | // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32 |
19 | // CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]]) |
20 | } |
21 | |
22 | uint32_t crc32h(uint32_t a, uint16_t b) |
23 | { |
24 | return __builtin_arm_crc32h(a,b); |
25 | // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32 |
26 | // CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]]) |
27 | } |
28 | |
29 | uint32_t crc32ch(uint32_t a, uint16_t b) |
30 | { |
31 | return __builtin_arm_crc32ch(a,b); |
32 | // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32 |
33 | // CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]]) |
34 | } |
35 | |
36 | uint32_t crc32w(uint32_t a, uint32_t b) |
37 | { |
38 | return __builtin_arm_crc32w(a,b); |
39 | // CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b) |
40 | } |
41 | |
42 | uint32_t crc32cw(uint32_t a, uint32_t b) |
43 | { |
44 | return __builtin_arm_crc32cw(a,b); |
45 | // CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b) |
46 | } |
47 | |
48 | uint32_t crc32d(uint32_t a, uint64_t b) |
49 | { |
50 | return __builtin_arm_crc32d(a,b); |
51 | // CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b) |
52 | } |
53 | |
54 | uint32_t crc32cd(uint32_t a, uint64_t b) |
55 | { |
56 | return __builtin_arm_crc32cd(a,b); |
57 | // CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b) |
58 | } |
59 | |